Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV

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dc.contributor.advisorO'Hagan, Daniel Wen_ZA
dc.contributor.authorDusterwald, Thomasen_ZA
dc.date.accessioned2018-05-03T12:17:56Z
dc.date.available2018-05-03T12:17:56Z
dc.date.issued2018en_ZA
dc.description.abstractSuperDARN is an international network of 35 HF radars located near the poles of the Earth dedicated to determining the state of the ionosphere at high latitudes. One of the SuperDARN radars is located at South Africa's base in Antarctica (SANAE IV) and is administered by the South African National Space Association (SANSA). The radar at SANAE IV was recently upgraded to a fully digital transceiver, with the addition of a Field Programmable Gate Array (FPGA) at the core of this upgrade. FPGAs allow for easy hardware reconfiguration and high-performance computing. The aim of this project is to determine the feasibility of using the FPGA on board the radar at SANAE IV to implement a riometer mode to run simultaneously with its main mode of operation, adding a new tool to the radar's set of abilities without any investment in new hardware. The riometer function could easily be ported to other radars in the SuperDARN network, allowing for a significant increase in riometer coverage of the polar regions. As a first step towards achieving this goal, a demonstrator riometer is developed using the Red Pitaya FPGA platform as its backend, and tested at the University of Cape Town, at SANSA in Hermanus and at Fish Hoek. A riometer measures the opacity of the ionosphere with respect to cosmic radiation. Doing this over a wide band of frequencies results in a spectral riometer. This dissertation describes the design and implementation of both a single frequency and a spectral riometer, both implemented on the Red Pitaya, and the results of testing these implementations. Experimentation alongside a La Jolla 38MHz riometer revealed very similar performance for the low-cost demonstrator riometer. It is thereby shown that low cost HF riometry is possible and that it is feasible to implement a riometer on the radar at SANAE IV. However, an additional FPGA is required.en_ZA
dc.identifier.apacitationDusterwald, T. (2018). <i>Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV</i>. (Thesis). University of Cape Town ,Faculty of Engineering & the Built Environment ,Department of Electrical Engineering. Retrieved from http://hdl.handle.net/11427/27872en_ZA
dc.identifier.chicagocitationDusterwald, Thomas. <i>"Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV."</i> Thesis., University of Cape Town ,Faculty of Engineering & the Built Environment ,Department of Electrical Engineering, 2018. http://hdl.handle.net/11427/27872en_ZA
dc.identifier.citationDusterwald, T. 2018. Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV. University of Cape Town.en_ZA
dc.identifier.ris TY - Thesis / Dissertation AU - Dusterwald, Thomas AB - SuperDARN is an international network of 35 HF radars located near the poles of the Earth dedicated to determining the state of the ionosphere at high latitudes. One of the SuperDARN radars is located at South Africa's base in Antarctica (SANAE IV) and is administered by the South African National Space Association (SANSA). The radar at SANAE IV was recently upgraded to a fully digital transceiver, with the addition of a Field Programmable Gate Array (FPGA) at the core of this upgrade. FPGAs allow for easy hardware reconfiguration and high-performance computing. The aim of this project is to determine the feasibility of using the FPGA on board the radar at SANAE IV to implement a riometer mode to run simultaneously with its main mode of operation, adding a new tool to the radar's set of abilities without any investment in new hardware. The riometer function could easily be ported to other radars in the SuperDARN network, allowing for a significant increase in riometer coverage of the polar regions. As a first step towards achieving this goal, a demonstrator riometer is developed using the Red Pitaya FPGA platform as its backend, and tested at the University of Cape Town, at SANSA in Hermanus and at Fish Hoek. A riometer measures the opacity of the ionosphere with respect to cosmic radiation. Doing this over a wide band of frequencies results in a spectral riometer. This dissertation describes the design and implementation of both a single frequency and a spectral riometer, both implemented on the Red Pitaya, and the results of testing these implementations. Experimentation alongside a La Jolla 38MHz riometer revealed very similar performance for the low-cost demonstrator riometer. It is thereby shown that low cost HF riometry is possible and that it is feasible to implement a riometer on the radar at SANAE IV. However, an additional FPGA is required. DA - 2018 DB - OpenUCT DP - University of Cape Town LK - https://open.uct.ac.za PB - University of Cape Town PY - 2018 T1 - Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV TI - Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV UR - http://hdl.handle.net/11427/27872 ER - en_ZA
dc.identifier.urihttp://hdl.handle.net/11427/27872
dc.identifier.vancouvercitationDusterwald T. Implementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IV. [Thesis]. University of Cape Town ,Faculty of Engineering & the Built Environment ,Department of Electrical Engineering, 2018 [cited yyyy month dd]. Available from: http://hdl.handle.net/11427/27872en_ZA
dc.language.isoengen_ZA
dc.publisher.departmentDepartment of Electrical Engineeringen_ZA
dc.publisher.facultyFaculty of Engineering and the Built Environment
dc.publisher.institutionUniversity of Cape Town
dc.subject.otherElectrical Engineeringen_ZA
dc.subject.otherRadar and Electronic Defenceen_ZA
dc.titleImplementation of a low cost demonstrator riometer on a flexible FPGA backend: The first steps in adding a riometer mode to the digital SuperDARN radar at SANAE IVen_ZA
dc.typeMaster Thesis
dc.type.qualificationlevelMasters
dc.type.qualificationnameMSc (Eng)en_ZA
uct.type.filetypeText
uct.type.filetypeImage
uct.type.publicationResearchen_ZA
uct.type.resourceThesisen_ZA
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