Browsing by Author "Wilkinson, Andrew"

Now showing 1 - 5 of 5
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    An on-line velocity flow profiling system using electrical resistance tomography
    (2006) Long, Timothy Matthew; Wilkinson, Andrew
    A system to display velocity profiles of flows through the CPUT FPRC pipe test loop on-line has been developed. An electrical resistance tomography instrument developed at the University of Cape Town is used to generate conductivity profiles through cross sections of the flow in a 057mm pipe at two points, separated by either 50 or 100mm. The two concentration profiles are cross correlated on a pixel-wise basis to produce a velocity profile. The software was developed using C++ and employs a highly modular structure that allows different image reconstruction and cross correlation algorithms to be implemented without substantial changes to the rest of the application. Results showing the speed performance of the system are presented as well as typical velocity profiles from a sliding bed flow regime.
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    Open Access
    An on-line velocity flow profiling system using electrical resistance tomography
    (2006) Long, Timothy Matthew; Wilkinson, Andrew
    A system to display velocity profiles of flows through the CPUT FPRC pipe test loop on-line has been developed. An electrical resistance tomography instrument developed at the University of Cape Town is used to generate conductivity profiles through cross sections of the flow in a 057mm pipe at two points, separated by either 50 or 100mm. The two concentration profiles are cross correlated on a pixel-wise basis to produce a velocity profile. The software was developed using C++ and employs a highly modular structure that allows different image reconstruction and cross correlation algorithms to be implemented without substantial changes to the rest of the application. Results showing the speed performance of the system are presented as well as typical velocity profiles from a sliding bed flow regime.
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    Open Access
    Design of a low-resource 2D graphics engine for FPGAs
    (2018) Tolmie, Donald Francois; Wilkinson, Andrew; Ginsberg, Samuel
    This study focused on the design and implementation of a low-resource graphics engine, MicroGE, which can be implemented on an FPGA. MicroGE uses a minimal amount of FPGA resources when compared to other graphics engines. After researching existing graphics engines, it was discovered that most make use of a memory space to store frame buffer data. Because of the restrictions that were imposed on the design of MicroGE, it could not incorporate a large enough memory space to store a frame buffer. It was specified that MicroGE should be able to fit on low-resource FPGAs, without any external memory components. Also, MicroGE should be able to fit on modern, high-resource, FPGAs without using a significant amount of those FPGAs’ resources. These goals were achieved by designing MicroGE according to an architecture which differs from the ones of existing graphics engines. MicroGE only renders parts of the video frame, which can be stored in a small memory space, before those parts are transmitted to an HDMI or DVI monitor. After the design was completed, MicroGE, along with other components, was implemented in a VHDL design. Hardware was developed, which contained a Spartan-6 LX25 FPGA, to verify this VHDL. Other verification methods, including the use of VHDL test benches, were also used to verify the VHDL design. A software library, MGAPI, was developed on an Arduino Due microcontroller board. This software library allowed the Arduino Due to display graphics on an HDMI monitor via MicroGE. The Arduino Due was able to update the display of 1000 graphics primitives within 111 ms. The internal FPGA RAM resource usage of MicroGE, 792 kb, was found to be significantly lower than the amount of memory required for a frame buffer. Even though these results were satisfactory, there are still many improvements that can be made to MicroGE. These improvements include increasing the number of rendering capabilities, optimisation of power usage, and increasing the control and video output interfaces.
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    Development of an RF listening mode on the TIGER-3 FPGA platform
    (2020) van Zyl, Willem Francois; Wilkinson, Andrew
    High frequency (HF) radars have many critical applications due to the effects that physical media have on the wave's propagation. The diffraction of HF radio waves in the ionosphere allows for long range communication and radar operation. Waves travel over the horizon where they may be reflected off large scatterers such as ships, or monitor sea states over large oceanic surface areas. Furthermore, the ionosphere provides key information on solar weather. Monitoring RF reflections from the ionosphere (specifically at the polar regions) is of great importance to the scientific community. The use of the HF (3-30 Mhz) has been greatly simplified for radar transceivers in recent decades. Digital hardware can sample and process information fast enough to eliminate the need for conventional analogue down-converters. The result is an increase in sensitivity, signal to noise ratio and design simplicity. The primary advantage of digital radars is versatility. The ability to change parameters and even modes of operation means that digital radars have become more common, and have replaced or been partly integrated into most of their analogue counterparts. The SuperDARN is a network of ionosphere monitoring radars that have been in operation since the 1980s. Since its inception it has undergone multiple improvements and served the scientific community well. The 4th South African National Arctic Expedition (SANAE IV) makes use of a digital radar platform based on the third generation TIGER-3 FPGA boards. The highly adaptable nature of the transceivers provide a host of secondary applications and improvements to its analogue predecessors. The system is however not in a state that supports further development. Currently the system is programmed for a set mode of operation without access to the source software. This work details the design and implementation process followed to bring the TIGER-3 system to a state that will support further development. In this state, peripheral interfaces are designed and implemented to allow for a listening mode of operation. In this mode, the radar samples a signal from an antenna and effectively communicates the data to a personal computer via an Ethernet link. To achieve these outcomes; FPGA code (written in Verilog) was developed to implement IQ downconversion, digital filtering, and a client interface for the Ethernet link. The features were tested by recording and analysing digital outputs from the platform, and finally, by recording signal information obtained through the Ethernet interface. Supporting literature will lay the groundwork for future projects to build on the base layer implementation; with the hope of redesigning the current SuperDARN implementation in the future. Further improvements to the current system could include a range of scanning patters and multi-frequency operation.
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    High frequency surface wave radar demonstrator
    (2018) Burger, Johann; O'Hagan, Daniel; Wilkinson, Andrew
    High Frequency Surface Wave Radar (HFSWR) is used around the globe for the mapping of sea currents and coastal monitoring of the Exclusive Economic Zone. Decision to build an HF radar at the University of Cape Town (UCT) was made by Daniel O’Hagan and Andrew Wilkinson in February 2015 immediately after seeing a demonstration of the CODAR system at IMT. Their intention was subsequently discussed at several meetings, including a South African Radar Interest Group (SARIG) meeting and one at IMT in order to gauge interest and raise funding. There was both interest (mainly for ocean current monitoring) and scepticism (expressed by CSIR and SARIG members) of the value of HF radar for ship monitoring. This reports the design, construction, test, and evaluation of the UCT HFSWR demonstrator. A modular approach was taken in its design and construction making it easy to replicate and upscale. A pillar of this work is to prove the feasibility of a software defined radar (SDR) based HF radar demonstrator. Every part of the demonstrator was designed and constructed from scratch as UCT had no prior HF activities, and therefore no legacy antennas or components to utilise. A low-cost RF frontend follows the HF antennas, which were also designed for this project. Combined with an SDR platforn known as the Red Pitaya (RP), a complete HF radar demonstrator was assembled and trials were conducted at the UCT rugby field and at the IMT facilities in Simon’s Town. A preliminary assessment of the results reveal the effects of Bragg resonance scatter and detection of two stationary targets (mountains) distinguishable by both range and azimuth. This assessment of the results indicates that the demonstrator is operational.