Browsing by Author "Weehuizen, Hermanis Frans"

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    Direct digital control of a D.C. machine
    (1972) Weehuizen, Hermanis Frans; McLaren, S G
    The object of this thesis is to build an interface between a computor and a three phase thyristor bridge rectifier, enabling the computor to control its D.C. output voltage. By writing a suitable computor program, this system was extended to provide closed loop computor control of the speed of a D.C. machine. The first interface and computor program were so designed that the computer provided the required analogue triggering delay for voltage control of the D.C. output. This setup did not allow for infinite variation of the voltage and occupied a large portion of the computor time. Thus it was decided to modify the interface, letting it provide its own delay, thus freeing the computor of the delay routine and giving it more time to do other tasks. Control of the bridge rectifier was also improved. When closed loop control was implemented, the system was found to be unstable. It was thus simulated and stabilized on the analogue computor. A new digital computor program was written incorporating those characteristics which were found necessary in the simulation to make the system stable. The modified form of compensation was found to give a satisfactory performance for both step and ramp inputs to the system as well as load transients on the D.C. motor. Various types of tachogenerator were tested to find which was the most suitable for operation with the computer. All the types tested gave satisfactory performances. The major factor affecting performance was the quality of the tachogenerator.
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    Simulation of distributed computer networks
    (1987) Weehuizen, Hermanis Frans; McLaren, S G
    This is a study of the simulated performance of two local area networks, Ethernet and the MAP network, respectively based on the IEEE standards 802.3 and 802.4. The simulation language chosen is of the discrete event type rather than the more usual analytical model. This is done in order to observe the interaction between the various entities of a network in order to gain a better understanding of the method of operation of such a system. The performance demanded of a node entity by the networks is determined. The performance of some commercially available hardware is derived from manufacturer's specifications and compared with that required by the network. It is found that there is a significant disparity, with the network requirements far exceeding that of the hardware capabilities. The simulation models developed are used to determine the performance of the networks both with and without the limitations imposed by currently available hardware. While the inclusion of the hardware performance causes little ·loss in performance for the Ethernet network, it has a highly detrimental effect on that of the MAP network. A possible solution is found to this limitation which requires minimal change to the existing protocol. The conclusions reached are that with currently available hardware a group of nodes are able to fully utilise the performance of the Ethernet LAN although a single pair of nodes is unable to do so. With regard to the MAP network, the network performance is limited by that of the node performance although this can be offset to a certain extent by careful choice of one of the protocol parameters, or modification of the hardware design.